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AMD Geode™ LX Processors Data Book 169
CPU Core Register Descriptions
33234H
5.5.2.73 Region Configuration Range MSRs 0 through 7
Region Configuration Range 0 MSR (RCONF0_MSR)
Region Configuration Range 1 MSR (RCONF1_MSR)
Region Configuration Range 2 MSR (RCONF2_MSR)
Region Configuration Range 3 MSR (RCONF3_MSR)
Region Configuration Range 4 MSR (RCONF4_MSR)
Region Configuration Range 5 MSR (RCONF5_MSR)
Region Configuration Range 6 MSR (RCONF6_MSR)
Region Configuration Range 7 MSR (RCONF7_MSR)
MSR Address 00001810h
Typ e R /W
Reset Value 00000000_00000000h
Warm Start Value xxxxx000_xxxxx0xxh
MSR Address 00001811h
Typ e R /W
Reset Value 00000000_00000000h
Warm Start Value xxxxx000_xxxxx0xxh
MSR Address 00001812h
Typ e R /W
Reset Value 00000000_00000000h
Warm Start Value xxxxx000_xxxxx0xxh
MSR Address 00001813h
Typ e R /W
Reset Value 00000000_00000000h
Warm Start Value xxxxx000_xxxxx0xxh
MSR Address 00001814h
Type R /W
Reset Value 00000000_00000000h
Warm Start Value xxxxx000_xxxxx0xxh
MSR Address 00001815h
Type R /W
Reset Value 00000000_00000000h
Warm Start Value xxxxx000_xxxxx0xxh
MSR Address 00001816h
Type R /W
Reset Value 00000000_00000000h
Warm Start Value xxxxx000_xxxxx0xxh
MSR Address 00001817h
Type R /W
Reset Value 00000000_00000000h
Warm Start Value xxxxx000_xxxxx0xxh
RCONFx_MSR Register Map
63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32
RPTOP RSVD
313029282726252423222120191817161514131211109876543210
RPBASE RSVD
RPEN
RP
RCONFx_MSR Bit Descriptions
Bit Name Description
63:44 RPTOP Top of Range. 4 KB granularity, inclusive.
43:32 RSVD Reserved.
31:12 RPBASE Start of Range. 4 KB granularity, inclusive.
11:9 RSVD Reserved.
8 RPEN Enable Range.
0: Disable range.
1: Enable range.
7:0 RP Range Properties.
Note: Region Properties: Bits [7:6] = RSVD; Bit 5 = WS; Bit 4 = WC; Bit 3 = WT; Bit 2 = WP; Bit 1 = WA; Bit 0 = CD.
See "Region Properties" on page 170 for further details.