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434 AMD Geode™ LX Processors Data Book
Video Processor Register Descriptions
33234H
6.8.3.17 32-Bit CRC Signature (CRC32)
6.8.3.18 Video De-Interlacing and Alpha Control (VDE)
VP Memory Offset 090h
Typ e RO
Reset Value 00000000_00000001h
CRC32 Register Map
63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32
RSVD
313029282726252423222120191817161514131211109876543210
SIG_VALUE
CRC32 Bit Descriptions
Bit Name Description
63:32 RSVD (RO) Reserved (Read Only). Reads back as 0.
31:0 SIG_VALUE
(RO)
Signature Value (Read Only). A 32-bit signature value is stored in this field when in 32-
bit CRC mode and can be read at any time. The 32-bit CRC mode select bit is located in
VP Diagnostic MSR (MSR 48000010h[31]). The signature is produced from the RGB
data before it is sent to the CRT DACs. This field is used for test purposes only.
See VP Memory Offset 088h for more information.
VP Memory Offset 098h
Typ e R /W
Reset Value 00000000_00000400h
VDE Register Map
63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32
RSVD
313029282726252423222120191817161514131211109876543210
RSVD A3P A2P A1P
ALPHA_DRBG
VID_ALPHA_EN
GV_SEL
CSC_VOP
CSC_GFX
CSC_VIDEO
HDSD
GFX_INS_VIDEO
YUV_CSC_EN
HDSD_VIDEO
RSVD
SP
RSVD
SP
VDE Bit Descriptions
Bit Name Description
63:22 RSVD (RO) Reserved (Read Only). Reads back as 0.
21:20 A3P Alpha Window 3 Priority. Indicates the priority of alpha window 3. A higher number indi-
cates a higher priority. Priority is used to determine display order for overlapping alpha
windows.
This field is reset by hardware to 00.
19:18 A2P Alpha Window 2 Priority. Indicates the priority of alpha window 2. A higher number indi-
cates a higher priority. Priority is used to determine display order for overlapping alpha
windows.
This field is reset by hardware to 00.