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196 AMD Geode™ LX Processors Data Book
CPU Core Register Descriptions
33234H
41:40 LEN0 Extended Breakpoint 0 Length. Selects the size of extended breakpoint 1. See LEN3
(bits [47:46]) for decode.
35 E3 Extended Breakpoint 3 Enable. Allows extended breakpoint 3 to be enabled.
0: Disable.
1: Enable.
34 E2 Extended Breakpoint 2 Enable. Allows extended breakpoint 2 to be enabled.
0: Disable.
1: Enable.
33 E1 Extended Breakpoint 1 Enable. Allows extended breakpoint 1 to be enabled.
0: Disable.
1: Enable.
32 E0 Extended Breakpoint 0 Enable. Allows extended breakpoint 0 to be enabled.
0: Disable.
1: Enable.
BXDR6
31:4 RSVD Reserved.
3T3 Extended Breakpoint 3 Triggered. A 1 Indicates that extended breakpoint 3 has trig-
gered. Write to clear. (Default = 0)
2T2 Extended Breakpoint 2 Triggered. A 1 Indicates that extended breakpoint 2 has trig-
gered. Write to clear. (Default = 0)
1T1 Extended Breakpoint 1 Triggered. A 1 Indicates that extended breakpoint 1 has trig-
gered. Write to clear. (Default = 0)
0T0 Extended Breakpoint 0 Triggered. A 1 Indicates that extended breakpoint 0 has trig-
gered. Write to clear. (Default = 0)
BXDR6_BXDR7_MSR Bit Descriptions (Continued)
Bit Name Description