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21264/EV68A Hardware Reference Manual
Error Detection and Error Handling 8–11
Error Case Summary
Memory single-bit
error on Icache fill
MCHK
and CRD
2
C_STAT[ISTREAM_MEM_ERR]
C_ADDR[error address]
C_SYNDROME_0
C_SYNDROME_1
Icache flushed Scrub erroras described
in
Section D.36.
Log as CRD
Memory single-bit
error on Dcache fill
CRD DC_STAT[ECC_ERR_LD]
C_STAT[DSTREAM_MEM_ERR]
C_ADDR[error address]
C_SYNDROME_0
C_SYNDROME_1
Corrected and
scrubbed in
Dcache
3
Scrub error as described
in
Section D.36.
Log as CRD
Bcache single-bit
error on a probe hit
CRD C_STAT[PROBE_BC_ERR]
C_ADDR[error address]
4
C_SYNDROME_0
C_SYNDROME_1
None May scrub error as
described in
Section
D.36
.
Log as CRD
Bcache double-bit
error on Icache fill
MCHK
1
C_STAT[ISTREAM_BC_DBL]
C_ADDR[error address]
4
None Log as MCHK
Bcache double-bit
error on Dcache fill
MCHK
1
C_STAT[DSTREAM_BC_DBL]
C_ADDR[error address]
4
None Log as MCHK
Memory double-bit
error on Icache fill
MCHK
1
C_STAT[ISTREAM_MEM_DBL]
C_ADDR[error address]
4
None Log as MCHK
Memory double-bit
error on Dcache fill
MCHK
1
C_STAT[DSTREAM_MEM_DBL]
C_ADDR[error address]
4
None Log as MCHK
1
Machine check taken in native mode. It is deferred while in PALmode.
2
CRD error posted in case the machine check is down a speculative path.
3
For a single-bit error on a non-target quadword, the error is not corrected in hardware,
but is corrected by PALcode during the scrub operation.
4
The contents of C_ADDR may not be accurate when there is heavy cache fill traffic.
Table 8–3 Error Case Summary (Continued)
Error Exception Status
Hardware
Action PALcode Action