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21264/EV68A Hardware Reference Manual
Alpha Instruction Set A–11
VAX Floating-Point Instructions
Programming Note:
In order to use CMPTxx with software completion trap handling, it is necessary to
specify the /SU IEEE trap mode, even though an underflow trap is not possible. In order
to use CVTQS or CVTQT with software completion trap handling, it is necessary to
specify the /SUI IEEE trap mode, even though an underflow trap is not possible.
A.4 VAX Floating-Point Instructions
Table A–6 lists the hexadecimal value of the 11-bit function code field for the VAX
floating-point instructions. The opcode for these instructions is 15
16
.
A.5 Independent Floating-Point Instructions
Table A–7 lists the hexadecimal value of the 11-bit function code field for the floating-
point instructions that are not directly tied to IEEE or VAX floating point. The opcode
for the following instructions is 17
16
.
Table A–6 VAX Floating-Point Instruction Function Codes
Mnemonic None /C /U /UC /S /SC /SU /SUC
ADDF
080 000 180 100 480 400 580 500
ADDG
0A0 020 1A0 120 4A0 420 5A0 520
CMPGEQ
0A5 4A5
CMPGLE
0A7 4A7
CMPGLT
0A6 4A6
CVTDG
09E 01E 19E 11E 49E 41E 59E 51E
CVTGD
0AD 02D 1AD 12D 4AD 42D 5AD 52D
CVTGF
0AC 02C 1AC 12C 4AC 42C 5AC 52C
CVTGQ
See below
CVTQF
0BC 03C
CVTQG
0BE 03E
DIVF
083 003 183 103 483 403 583 503
DIVG
0A3 023 1A3 123 4A3 423 5A3 523
MULF
082 002 182 102 482 402 582 502
MULG
0A2 022 1A2 122 4A2 422 5A2 522
SQRTF
08A 00A 18A 10A 48A 40A 58A 50A
SQRTG
0AA 02A 1AA 12A 4AA 42A 5AA 52A
SUBF
081 001 181 101 481 401 581 501
SUBG
0A1 021 1A1 121 4A1 421 5A1 521
Mnemonic None /C /V /VC /S /SC /SV /SVC
CVTGQ
0AF 02F 1AF 12F 4AF 42F 5AF 52F