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21264/EV68A Hardware Reference Manual
Index–1
Index
Numerics
21264/EV68A, features of, 1–3
32_BYTE_IO Cbox CSR
defined
, 5–34
A
Abbreviations, xix
binary multiples
, xix
register access
, xix
AC characteristics
, 9–6
Address conventions
, xx
Aggregate mode
, 6–18
Aligned convention
, xx
Alpha instruction summary
, A–1
AMASK instruction values
, 2–37
ARITH synchronous trap
, 6–14
B
B_DA_OD pin type, 3–3, 9–2
values for
, 9–4
B_DA_PP pin type
, 3–3, 9–2
values for
, 9–4
BC_BANK_ENABLE Cbox CSR
, 4–51, 5–39,
7–13
BC_BPHASE_LD_VECTOR Cbox CSR
, 4–45
defined
, 5–38
BC_BURST_MODE_ENABLE Cbox CSR
, 4–51
defined
, 5–35
BC_CLEAN_VICTIM Cbox CSR
, 4–23
defined
, 5–34
BC_CLK_DELAY Cbox CSR
, 4–45
defined
, 5–35
BC_CLK_LD_VECTOR Cbox CSR
, 4–45
defined
, 5–38
BC_CLKFWD_ENABLE Cbox CSR
, 4–47
defined
, 5–36
BC_CLOCK_OUT Cbox CSR
, 4–45
BC_CPU_CLK_DELAY Cbox CSR
, 4–44, 4–45
defined
, 5–38
BC_CPU_LATE_WRITE_NUM Cbox CSR
defined
, 5–35
BC_DDM_FALL_EN Cbox CSR
, 4–47
defined
, 5–36
BC_DDM_RISE_EN Cbox CSR
, 4–47
defined
, 5–36
BC_DDMF_ENABLE Cbox CSR
, 4–47
defined
, 5–35
BC_DDMR_ENABLE Cbox CSR
, 4–47
defined
, 5–35
BC_ENABLE Cbox CSR
, 4–51, 5–39, 7–12
BC_FDBK_EN Cbox CSR
, 4–46
defined
, 5–38
BC_FRM_CLK Cbox CSR
, 4–47
defined
, 5–35
BC_LAT_DATA_PATTERN Cbox CSR
, 4–48
defined
, 5–35
BC_LAT_TAG_PATTERN Cbox CSR
, 4–48
defined
, 5–35
BC_LATE_WRITE_NUM Cbox CSR
, 4–49
defined
, 5–35
BC_LATE_WRITE_UPPER Cbox CSR
defined
, 5–35
BC_PENTIUM_MODE Cbox CSR
, 4–51
defined
, 5–35
BC_PERR error status in C_STAT
, 5–42
BC_RCV_MUX_CNT_PRESET Cbox CSR
defined
, 5–36
BC_RCV_MUX_PRESET_CNT Cbox CSR
, 4–48
BC_RD_RD_BUBBLE Cbox CSR
defined
, 5–34
BC_RD_WR_BUBBLES Cbox CSR
, 4–49
defined
, 5–34
BC_RDVICTIM Cbox CSR
, 4–23, 4–26
defined
, 5–34
BC_SIZE Cbox CSR
, 4–51, 5–39, 7–12