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21264/EV68A Hardware Reference Manual
PALcode Restrictions and Guidelines D–7
Restriction 1 : Reset Sequence Required by Retire Logic and Mapper
mtpr r31,EV6__PCTR_CTL /* 2nd buffer fetch block for above map-stall
/* and 2nd clear PCTR_CTL (SCRBRD=4)*/
bis r31,1,r0 /* set up value for demon write*/
bis r31,1,r0 /* set up value for demon write*/
mulq r31,r31,r0 /* nop*/
lda r0,0x780(r31) /* this is new initialization stuff to
prevent*/
mb
whint r0 /* ld/st below from going off-chip */
mb
bis r31,1,r0 /* set up value for demon write*/
ldq_p r1,0x780(r31) /* flush Pipe 0 LD logic*/
ldq_p r0,0x788(r31) /* flush Pipe 1 LD logic*/
mb /* wait for LD’s to complete*/
mb /* wait for LD’s to complete*/
stq_p r1,0x780(r31) /* flush Pipe 0 ST logic*/
stq_p r0,0x788(r31) /* flush Pipe 1 ST logic*/
bis r31, 32, r0 /* load loop count of 32*/
jsr_init_loop:
bsr r31,jsr_init_loop_nxt /* JSR to PC+4*/
jsr_init_loop_nxt:
stq_p r1,0x780(r31) /* flush Pipe 0 ST logic*/
subq r0,1,r0 /* decrement loop count*/
beq r0,jsr_init_done /* done?*/
br r31,jsr_init_loop /* continue loop*/
jsr_init_done:
lda r0,0x03FF(r31) /* create FP one..... */
sll r0,52,r0 /* .....value = 0x3FF0000000000000 */
itoft r0,f0 /* put it into F0 reg */
addq r31,r31,r1 /* nop (also clears R1) */
mult f0,f0,f0 /* flush mul-pipe */
addt f0,f0,f0 /* flush add-pipe */
divt f0,f0,f0 /* flush div-pipe */
sqrtt f0,f0 /* flush div-pipe */
cvtqt f0,f0 /* flush add-pipe (integer logic) */
perr r31,r31,r0 /* flush MVI logic */
maxuw4 r31,r31,r0 /* flush MVI logic */
pkwb r31,r0 /* flush MVI logic */
rc r0 /* clear interrupt flag*/
addq r31,r31,r1 /* nop (also clears R1)*/
addq r31,r31,r1 /* nop (also clears R1)*/
addq r31,r31,r1 /* nop (also clears R1)*/
/*
* This palbase init exists for the rare cases
* when this code is loaded into upper memory.
* That is the case when this code is loaded
* and executed in memory on a system that has
* already been initialized. This technique
* can sometimes be used to debug snippets of
* this code.
*/