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Glossary–12
21264/EV68A Hardware Reference Manual
output mux counter
Counter used to select the output mux that drives address and data. It is reset with the
Interface Reset and incremented by a copy of the locally generated forwarded clock.
PAL
Privileged architecture library. See also PALcode. See also Programmable array logic
(hardware). A device that can be programmed by a process that blows individual fuses
to create a circuit.
PALcode
Alpha privileged architecture library code, written to support Alpha microprocessors.
PALcode implements architecturally defined behavior.
PALmode
A special environment for running PALcode routines.
parameter
A variable that is given a specific value that is passed to a program before execution.
parity
A method for checking the accuracy of data by calculating the sum of the number of
ones in a piece of binary data. Even parity requires the correct sum to be an even num-
ber, odd parity requires the correct sum to be an odd number.
PGA
Pin grid array.
pipeline
A CPU design technique whereby multiple instructions are simultaneously overlapped
in execution.
PLA
Programmable logic array.
PLCC
Plastic leadless chip carrier or plastic-leaded chip carrier.
PLD
Programmable logic device.
PLL
Phase-locked loop.
PMOS
P-type metal-oxide semiconductor.
PQ
Probe queue.