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See Section 2.14 for information about the floating-point control register (FPCR).
SNaN operand 0 Invalid Op
CVTfi OUTPUT
Inexact result Result Inexact
Integer overflow Truncated result Invalid Op
CVTif OUTPUT
Inexact result Result Inexact
CVTff INPUT
Inf operand ±Inf (none)
QNaN operand QNaN (none)
SNaN operand QNaN Invalid Op
CVTff OUTPUT (same as ADDx)
FBEQ FBNE FBLT FBLE FBGT FBGE
LDS LDT
STS STT
CPYS CPYSN
FCMOVx
Table A–11 Exceptional Input and Output Conditions (Continued)
Alpha Instructions
21264/EV68A Hardware
Supplied Result Exception