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Two Port 10/100 Managed Ethernet Switch with 16-Bit Non-PCI CPU Interface
Datasheet
Revision 1.4 (08-19-08) 216 SMSC LAN9311/LAN9311i
DATASHEET
14.2.5.15 1588 Clock Addend Register (1588_CLOCK_ADDEND)
This read/write register is responsible for adjusting the 64-bit 1588 Clock frequency. Refer to
Chapter 11, "IEEE 1588 Hardware Time Stamp Unit," on page 155 for details on how to properly use
this register.
Offset: 178h Size: 32 bits
BITS DESCRIPTION TYPE DEFAULT
31:0 Clock Addend (CLOCK_ADDEND)
This 32-bit value is added to the 1588 frequency divisor accumulator every
cycle. This allows the base 100MHz frequency of the 64-bit 1588 Clock to
be adjusted accordingly.
R/W 00000000h