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Two Port 10/100 Managed Ethernet Switch with 16-Bit Non-PCI CPU Interface
Datasheet
SMSC LAN9311/LAN9311i 65 Revision 1.4 (08-19-08)
DATASHEET
The following procedure should be followed in order to add, delete, and modify the ALR entries:
1. Write the Switch Engine ALR Write Data 0 Register (SWE_ALR_WR_DAT_0) and Switch Engine
ALR Write Data 1 Register (SWE_ALR_WR_DAT_1) with the desired MAC address and control
bits.
Note:An entry can be deleted by setting the Valid and Static bits to 0.
2. Write the Switch Engine ALR Command Register (SWE_ALR_CMD) register with 0004h (Make
Entry)
3. Poll the Make Pending bit in the Switch Engine ALR Command Status Register
(SWE_ALR_CMD_STS) until it is cleared.
4. Write the Switch Engine ALR Command Register (SWE_ALR_CMD) with 0000h.
The ALR contains a search engine that is used by the host to read the MAC Address Table. This
engine is accessed by using the Switch Engine ALR Command Register (SWE_ALR_CMD), Switch
Engine ALR Read Data 0 Register (SWE_ALR_RD_DAT_0), and Switch Engine ALR Read Data 1
Register (SWE_ALR_RD_DAT_1).
Note: The entries read are not necessarily in the same order as they were learned or manually
added.
The following procedure should be followed in order to read the ALR entries:
1. Write the Switch Engine ALR Command Register (SWE_ALR_CMD) with 0002h (Get First Entry).
2. Write the Switch Engine ALR Command Register (SWE_ALR_CMD) with 0000h (Clear the Get
First Entry Bit)
3. Poll the Valid and End of Table bits in the Switch Engine ALR Read Data 1 Register
(SWE_ALR_RD_DAT_1) until either are set.
4. If the Valid bit is set, then the entry is valid and the data from the Switch Engine ALR Read Data
0 Register (SWE_ALR_RD_DAT_0) and Switch Engine ALR Read Data 1 Register
(SWE_ALR_RD_DAT_1) can be stored.
5. If the End of Table bit is set, then exit.
6. Write the Switch Engine ALR Command Register (SWE_ALR_CMD) with 0001h (Get Next Entry).
7. Write the Switch Engine ALR Command Register (SWE_ALR_CMD) with 0000h (Clear the Get
Next Entry bit)
8. Go to step 3.
Note: Refer to Section 14.5.3.1, on page 368 through Section 14.5.3.6, on page 375 for detailed
definitions of these registers.