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Two Port 10/100 Managed Ethernet Switch with 16-Bit Non-PCI CPU Interface
Datasheet
Revision 1.4 (08-19-08) 340 SMSC LAN9311/LAN9311i
DATASHEET
14.5.2.17 Port x MAC Receive Jabber Error Count Register (MAC_RX_JABB_CNT_x)
This register provides a counter of received packets with greater than the maximum allowable number
of bytes and a FCS error. The counter is cleared upon being read.
Note: For this counter, a packet with the maximum number of bytes that is not an integral number of
bytes (e.g. a 1518 1/2 byte packet) and contains a FCS error is not considered jabber and is
not counted here.
Register #: Port0: 041Eh Size: 32 bits
Port1: 081Eh
Port2: 0C1Eh
BITS DESCRIPTION TYPE DEFAULT
31:0 RX Jabber
Count of packets that have more than the maximum allowable number of
bytes and a FCS error. The max number of bytes is 1518 for untagged
packets and 1522 for tagged packets. If Jumbo2K (bit 3) is set in the Port x
MAC Receive Configuration Register (MAC_RX_CFG_x), the max number
of bytes is 2048.
Note: This counter will stop at its maximum value of FFFF_FFFFh.
Minimum rollover time at 100Mbps is approximately 8813 hours.
RC 00000000h