AMD Geode™ SC3200 Processor Data Book 39
Signal Definitions
32581C
AL20
5
MD44 I/O IN
T
,
TS
2/5
V
IO
---
AL21
5
MD40 I/O IN
T
,
TS
2/5
V
IO
---
AL22 CKEA O O
2/5
V
IO
---
AL23 MA7 O O
2/5
V
IO
---
AL24 MA4 O O
2/5
V
IO
---
AL25
5
MD8 I/O IN
T
,
TS
2/5
V
IO
---
AL26
5
MD10 I/O IN
T
,
TS
2/5
V
IO
---
AL27
5
MD9 I/O IN
T
,
TS
2/5
V
IO
---
AL28 MA12 O O
2/5
V
IO
---
AL29
5
MD23 I/O IN
T
,
TS
2/5
V
IO
---
Ball
No. Signal Name
I/O
(PU/PD)
Buffer
1
Type
Power
Rail Configuration
AL30 V
IO
PWR --- --- ---
AL31 V
SS
GND --- --- ---
1. For Buffer Type definitions, refer to Table 9-10 "Buffer Types" on page
357.
2. Is 5V tolerant (ACK#, AFD#/DSTRB#, BUSY/WAIT#, ERR#, INIT#,
PD[7:0], PE, SLCT, SLIN#/ASTRB#, STB#/WRITE#, ONCTL#,
PWRCNT[2:1]).
3. The TFT_PRSNT strap determines the power-on reset (POR) state of
PMR[23].
4. The LPC_ROM strap determines the power-on reset (POR) state of
PMR[14] and PMR[22].
5. Is back-drive protected (MD[63:0], DPOS_PORT1, DNEG_PORT1,
DPOS_PORT2, DNEG_PORT2, DPOS_PORT3, DNEG_PORT3,
ACK#, AFD#/DSTRB#, BUSY/WAIT#, ERR#, INIT#, PD[7:0], PE,
SLCT, SLIN#/ASTRB#, STB#/WRITE#, ONCTL#, PWRCNT[2:1]).
Ball
No. Signal Name
I/O
(PU/PD)
Buffer
1
Type
Power
Rail Configuration
Table 3-2. BGU481 Ball Assignment - Sorted by Ball Number (Continued)