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50 AMD Geode™ SC3200 Processor Data Book
Signal Definitions
32581C
X32I AJ2 I/O Crystal Connections. Connected directly to a 32.768
KHz crystal. This clock input is required even if the inter-
nal RTC is not being used. Some of the internal clocks
are derived from this clock. If an external clock is used, it
should be connected to X32I, using a voltage level of 0
volts to V
CORE
+10% maximum. X32O should remain
unconnected.
---
X32O AJ3 ---
X27I AG3 I/O Crystal Connections. Connected directly to a
27.000 MHz crystal. Some of the internal clocks are
derived from this clock. If an external clock is used, it
should be connected to X27I, using a voltage level of 0
volts to V
IO
and X27O should be remain unconnected.
---
X27O AH2 ---
CLK27M AA4 O 27 MHz Output Clock. Output of crystal oscillator. IDE_DATA5
PCIRST# A6 O PCI and System Reset. PCIRST# is the reset signal for
the PCI bus and system. It is asserted for approximately
100 µs after POR# is negated.
---
3.4.1 System Interface (Continued)
Signal Name Ball No. Type Description Mux
3.4.2 Memory Interface Signals
Signal Name Ball No. Type Description Mux
MD[63:0] See
Table 3-3
on page
40.
I/O Memory Data Bus. The data bus lines driven to/from
system memory.
---
MA[12:0] See
Table 3-3
on page
40.
O Memory Address Bus. The multiplexed row/column
address lines driven to the system memory. Supports
256-Mbit SDRAM.
---
BA1 AK14 O Bank Address Bits. These bits are used to select the
component bank within the SDRAM.
---
BA0 AJ13 ---
CS1# AH27 O Chip Selects. These bits are used to select the module
bank within system memory. Each chip select corre-
sponds to a specific module bank. If CS# is high, the
bank(s) do not respond to RAS#, CAS#, and WE# until
the bank is selected again.
---
CS0# AL12 ---
RASA# AK12 O Row Address Strobe. RAS#, CAS#, WE# and CKE are
encoded to support the different SDRAM commands.
RASA# is used with CS[1:0]#.
---
CASA# AJ12 O Column Address Strobe. RAS#, CAS#, WE# and CKE
are encoded to support the different SDRAM commands.
CASA# is used with CS[1:0]#.
---
WEA# AH12 O Write Enable. RAS#, CAS#, WE# and CKE are encoded
to support the different SDRAM commands. WEA# is
used with CS[1:0]#.
---