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396 AMD Geode™ SC3200 Processor Data Book
Electrical Specifications
32581C
Figure 9-33. Sustained UltraDMA Data Out Burst Timing Diagram
t
DS
t
DH
t
DS
t
DH
t
DH
t
DVH
t
DVS
t
DVH
t
DVS
t
DVH
t
2CYC
t
CYC
t
CYC
t
2CYC
IDE_DATA[15:0]
at host
IDE_DATA[15:0]
at device
IDE_IOR0#
(HSTROBE0#)
at host
IDE_IOR0#
(HSTROBE0#)
at device
Note: IDE_DATA[15:0] and IDE_IOR[0:1]# (HSTROBE[0:1]#) signals are shown at both the device and the host to
emphasize that cable settling time and cable propagation delay do not allow the data signals to be considered sta-
ble at the device until a certain amount of time after they are driven by the device.