Filter
Top Products
56 AMD Geode™ SC3200 Processor Data Book
Signal Definitions
32581C
REQ1# A5 I Request Lines. REQ[1:0]# indicate to the arbiter that an
agent requires the bus. Each master has its own REQ#
line. REQ# priorities (in order) are:
1) VIP
2) IDE Channel 0
3) IDE Channel 1
4) Audio
5) USB
6) External REQ0#
7) External REQ1#.
Each REQ# is internally connected to a pull-up resistor.
---
REQ0# B5 ---
GNT1# C6 O Grant Lines. GNT[1:0]# indicate to the requesting mas-
ter that it has been granted access to the bus. Each mas-
ter has its own GNT# line. GNT# can be retracted at any
time a higher REQ# is received or if the master does not
begin a cycle within a minimum period of time (16 PCI
clocks).
Each of these signals is internally connected to a pull-up
resistor.
GNT0# must have a pull-up resistor of 1.5 KΩ and
GNT1# must have a pull-up resistor of 1.5 KΩ.
DID1 (Strap)
GNT0# C5 DID0 (Strap)
3.4.6 PCI Bus Interface Signals (Continued)
Signal Name BalL No. Type Description Mux