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Alpha 21264/EV67 Hardware Reference Manual
Internal Processor Registers 5–1
5
Internal Processor Registers
This chapter describes 21264/EV67 internal processor registers (IPRs). They are sepa-
rated into the following circuit logic groups: Ebox, Ibox, Mbox, and Cbox.
The gray areas in register figures indicate reserved fields. Bit ranges that are coupled
with the field name specify those bits in that named field that are included in the IPR.
For example, in Figure 5–2, the field named COUNTER[31:4] contains bits 31 through
4 of the COUNTER field from Section 5.1.1. The bit range of COUNTER[31:4] in the
IPR is also listed in the column Extent in Table 5–2. In many cases, such as this one, the
bit ranges correspond. However, the bit range of the named field need not always corre-
spond to the Extent in the IPR. For example, in Figure 5–14, the field VA[47:13] resides
in IPR IVA_FORM[37:3] under the stated conditions.
The register contents after initialization are listed in Section 7.8.
Table 5–1 lists the 21264/EV67 internal processor registers.
Table 5–1 Internal Processor Registers
Register Name Mnemonic
Index
(Binary)
Score-
Board
Bit Access
MT/MF
Issued
from Ebox
Pipe
Latency
for
MFPR
(Cycles)
Ebox IPRs
Cycle counter CC 1100 0000 5 RW 1L 1
Cycle counter control CC_CTL 1100 0001 5 W0 1L —
Virtual address VA 1100 0010 4, 5, 6, 7 RO 1L 1
Virtual address control VA_CTL 1100 0100 5 WO 1L —
Virtual address format VA_FORM 1100 0011 4, 5, 6, 7 RO 1L 1
Ibox IPRs
ITB tag array write ITB_TAG 0000 0000 6 WO 0L —
ITB PTE array write ITB_PTE 0000 0001 4, 0 WO 0L —
ITB invalidate all process (ASM=0) ITB_IAP 0000 0010 4 WO 0L —
ITB invalidate all ITB_IA 0000 0011 4 WO 0L —
ITB invalidate single ITB_IS 0000 0100 4, 6 WO 0L —
ProfileMePC PMPC 0000 0101 — RO — —
Exception address EXC_ADDR 0000 0110 — RO 0L 3