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Alpha 21264/EV67 Hardware Reference Manual
Appendix C, Serial Icache Load Predecode Values, provides a pointer to the Alpha
Motherboards Software Developer’s Kit (SDK), which contains this information.
Appendix D, PALcode Restrictions and Guidelines, lists restrictions and guidelines
that must be adhered to when generating PALcode.
Appendix E, 21264/EV67-to-Bcache Pin Interconnections, provides the pin interface
between the 21264/EV67 and Bcache SSRAMs.
The Glossary lists and defines terms associated with the 21264/EV67.
An Index is provided at the end of the document.
Documentation Included by Reference
The companion volume to this manual, the Alpha Architecture Handbook, Version 4, con-
tains the instruction set architecture. You can access this document from the following
website: ftp.digital.com/pub/Digital/info/semiconductor/lit-
erature/dsc-library.html
Also available is the Alpha Architecture Reference Manual, Third Edition, which con-
tains the complete architecture information. That manual is available at bookstores
from the Digital Press as EQ-W938E-DP.