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A–16 Alpha Instruction Set
Alpha 21264/EV67 Hardware Reference Manual
IEEE Floating-Point Conformance
MULx INPUT
Inf operand ±Inf (none)
QNaN operand QNaN (none)
SNaN operand QNaN Invalid Op
0 * Inf CQNaN Invalid Op
MULx OUTPUT (same as ADDx)
DIVx INPUT
QNaN operand QNaN (none)
SNaN operand QNaN Invalid Op
0/0 or Inf/Inf CQNaN Invalid Op
A/0 (A not 0) ±Inf Div Zero
A/Inf ±0 (none)
Inf/A ±Inf (none)
DIVx OUTPUT (same as ADDx)
SQRTx INPUT
+Inf operand +Inf (none)
QNaN operand QNaN (none)
SNaN operand QNaN Invalid Op
-A (A not 0) CQNaN Invalid Op
-0 -0 (none)
SQRTx OUTPUT
Inexact result root Inexact
CMPTEQ CMPTUN INPUT
Inf operand True or False (none)
QNaN operand False for EQ, True for UN (none)
SNaN operand False for EQ,True for UN Invalid Op
CMPTLT CMPTLE INPUT
Inf operand True or False (none)
QNaN operand False Invalid Op
SNaN operand False Invalid Op
CVTfi INPUT
Inf operand 0 Invalid Op
QNaN operand 0 Invalid Op
Table A–11 Exceptional Input and Output Conditions (Continued)
Alpha Instructions
21264/EV67 Hardware
Supplied Result Exception