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Alpha 21264/EV67 Hardware Reference Manual
PALcode Restrictions and Guidelines D–19
Guideline 39: Writing Multiple DTB Entries in the Same PAL Flow
D.35 Guideline 39: Writing Multiple DTB Entries in the Same PAL
Flow
If a PALcode flow intends to write multiple DTB entries (as would occur in a double
miss), it must take care to keep subsequent HW_MTPR DTB_TAGx writes from cor-
rupting the staging register TAG values prior to retirement of the HW_MTPR
DTB_PTEx, which triggers the final DTB update.
For example, in the double miss DTB flow, the following code could be used to hold up
the return to the single miss flow (the numbers in parentheses are the scoreboard bits):
hw_mtpr r4, EV6__DTB_TAG0 ; (2&6) write tag0
hw_mtpr r4, EV6__DTB_TAG1 ; (1&5) write tag 1
hw_mtpr r5, EV6__DTB_PTE0 ; (0&4) write pte0
hw_mtpr r5, EV6__DTB_PTE1 ; (3&7) write pte1
bis r31, r31, r31 ; force new fetch block
bis r31, r31, r31
bis r31, r31, r31
hw_mtpr r31, <EV6__MM_STAT ! ^x80> ; (7) wait for pte write
hw_ret (r6) ; return to single miss
D.36 Restriction 40: Scrubbing a Single-Bit Error
On Bcache and Memory single bit errors on Icache fills, the hardware flushes the
Icache, but the PALcode must scrub the block in the Bcache and memory. On Bcache
and Memory single bit errors on Dcache fills, the hardware scrubs the Dcache as long
as the error was on a target quadword, but the PALcode must scrub the Dcache for non-
target quadwords, and must in general scrub the block in the Bcache and memory.
The scrub consists of reading each quadword in the block, with at least one exclusive
access load/store to ensure the corrected data will be scrubbed in Bcache and memory.
The scrub itself causes a CRD to be flagged, which is cleared by the PALcode before
exiting to native mode.
; Sample code for scrubbing a single bit error.
;
; Since we only have the block address, and the hardware only corrects
; target quadwords, we read each quadword.
; In order to ensure eviction to bcache and memory, a store
; is needed to mark the block dirty. An exclusive access is
; used to ensure we scrub in main memory. Virtual access is
; used because of restrictions in use of hw_ld/hw_st lock
; instructions.
; After the scrub, read the cbox chain again.
; The scrub will cause a crd, but will get cleared with a write
; to hw_int_clr.
;
; Current state:
; r5 base of crd logout frame
;
hw_ldq/p r4, MCHK_CRD__C_ADDR(r5) ; get address back
bis r31, r31, r31
bis r31, r31, r31
bis r31, r31, r31