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D–6 PALcode Restrictions and Guidelines
Alpha 21264/EV67 Hardware Reference Manual
Restriction 1 : Reset Sequence Required by Retire Logic and Mapper
br r31,bccshf /* continue shifting*/
bccend:mtpr r31,EV6__EXC_ADDR + 16/* dummy IPR write - sets SCBD bit 4 */
addq r31,r31,r0 /* nop*/
addq r31,r31,r1 /* nop*/
mtpr r31,EV6__EXC_ADDR + 16 /* also a dummy IPR write -
/* stalls until above write
/* retires*/
beq r31, bccnxt /* predicts fall through in PALmode*/
br r31, .-4 /* fools ibox predictor into infinite loop*/
addq r31,r31,r1 /* nop*/
bccnxt:addq r31,4,r0 /* load PCTX.....*/
mtpr r0,EV6__PROCESS_CONTEXT /* ..... FPE=1 (SCRBRD=4)*/
lda r0,DC_CTL_INIT_K(r31) /* load DC_CTL.....*/
mtpr r0,EV6__DC_CTL /* .....ECC_EN=0, FHIT=0, SET_EN=3
/* (SCRBRD=6)*/
addq r31,r31,r0 /* nop*/
addq r31,r31,r1 /* nop*/
lda r0,0xff61(r31) /* R0 = ^xff61 (superpage) */
zap r0,0xfc,r0 /* PTE protection for DTB write in next
block*/
mtpr r31,EV6__DTB_TAG0 /* write DTB_TAG0 (SCRBRD=2,6)*/
mtpr r31,EV6__DTB_TAG1 /* write DTB_TAG1 (SCRBRD=1,5)*/
mtpr r0,EV6__DTB_PTE0 /* write DTB_PTE0 (SCRBRD=0,4)*/
mtpr r0,EV6__DTB_PTE1 /* write DTB_PTE1 (SCRBRD=3,7)*/
mtpr r31,EV6__SIRR /* clear SIRR (SCRBRD=4)*/
lda r0,0x08FF(r31) /* load FPCR.....*/
sll r0,52,r0 /* .....initial FPCR value*/
itoft r0, f0 /* nop itoftr0,f0; value = 0x8FF0000000000000*/
mt_fpcr f0 /* nop mt_fpcrf0,f0,f0; do the load*/
lda r0,0x2086(r31) /* load I_CTL.....*/
ldah r0,0x0050(r0) /* .....TB_MB_EN=1, CALL_PAL_R23=1, SL_XMIT=1,
/* SBE=0, SDE=2, IC_EN=3*/
mtpr r0,EV6__I_CTL /* value = 0x0000000000502086 (SCRBRD=4)*/
mtpr r31,EV6__CC /* clear CC (SCRBRD=5)*/
lda r0,0x001F(r31) /* write-one-to-clear bits in HW_INT_CLR,
/* I_STAT and DC_STAT*/
sll r0,28,r0 /* value = 0x00000001F0000000*/
mtpr r0,EV6__HW_INT_CLR/* clear bits in HW_INT_CLR (SCRBRD=4)*/
mtpr r0,EV6__I_STAT /* clear bits in I_STAT
/*(SCRBRD=4) creates a map-stall
/* under the above mtpr to SCRBRD=4*/
lda r0,0x001F(r31) /* value = 0x000000000000001F*/
mtpr r0,EV6__DC_STAT /* clear bits in DC_STAT (SCRBRD=6)*/
addq r31,r31,r0 /* nop*/
mtpr r31,EV6__PCTR_CTL /* 1st buffer fetch block for above map-stall
/* and 1st clear PCTR_CTL (SCRBRD=4)*/
bis r31,1,r0 /* set up value for demon write*/
bis r31,1,r0 /* set up value for demon write*/
mulq/v r31,r31,r0 /* nop*/