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Intel
®
820E Chipset
R
Design Guide 115
2.22.3.5.3. Distance from LPF to Phone RJ11
Distance ‘C’ should be less than 1 inch. Regarding trace symmetry, route differential pairs with
consistent separation and with exactly the same lengths and physical dimensions.
Asymmetry and unequal length in the differential pairs contribute to common-mode noise. This can
degrade the receive-circuit performance and contribute to radiated emissions from the transmit side.
2.22.4. Intel
®
82562ET / Intel
®
82562EM Component Guidelines
Related document are as follows:
•
Intel
®
82562ET 10/100 Mbps Platform LAN Connect (PLC) Product Preview Datasheet
(Order# OR-2106).
• Intel
®
82562ET Platform LAN Connect (PLC) Networking Silicon Advance Information
Datasheet (released).
• Intel
®
82562EM Platform LAN Connect (PLC) Networking Silicon Advance Information
Datasheet (released).
• Intel
®
82562ET LAN on Motherboard Design Guide (AP-414): OR-2336
• Intel
®
82562ET/EM PCB Design Platform LAN Connect (AP-412): OR-2059.
• CNR Reference Design Application Note (AP-418): OR-2281.
For correct LAN performance, designers must comply with the general guidelines outlined in Section
2.22.2. Additional guidelines for implementing an Intel
82562ET or Intel 82562EM LAN connect
component are as follows:
2.22.4.1. Guidelines for Intel
®
82562ET / Intel
®
82562EM Component Placement
Component placement can affect the signal quality, emissions, and temperature of a board design. This
section provides guidelines for component placement.
Careful component placement has the following benefits:
• Decreases potential problems directly related to electromagnetic interference (EMI), which could
result in failure to meet FCC and IEEE test specifications.
• Simplifies the task of routing traces. To some extent, component orientation affects the trace routing
complexity. The overall objective is to minimize turns and crossovers between traces.
It is important to minimize the space needed for the Ethernet LAN interface, because all other interfaces
will compete for physical space on a motherboard near the connector edge. As with most subsystems, the
Ethernet LAN circuits must be as close as possible to the connector. Thus, all designs must be optimized
to fit in a very small space.