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820E Chipset
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Design Guide 91
2.13.3. AC’97 Routing
To ensure the maximum performance of the codec, proper component placement and routing techniques
are required. These techniques include properly isolating the codec, associated audio circuitry, analog
power supplies, and analog ground planes, from the rest of the motherboard. This includes plane splits
and proper routing of signals not associated with the audio section. Contact your vendor for device-
specific recommendations.
The basic recommendations are as follows:
• Special consideration must be given for the ground return paths for the analog signals.
• Digital signals routed in the vicinity of the analog audio signals must not cross the power plane split
lines. Analog and digital signals should be located as far as possible from each other.
• Partition the board with all analog components grouped together in one area and all digital
components in another.
• Separate analog and digital ground planes should be provided, with the digital components over the
digital ground plane, and the analog components, including the analog power regulators, over the
analog ground plane. The split between planes must be a minimum of 0.05 inches wide.
• Keep digital signal traces, especially the clock, as far as possible from the analog input and voltage
reference pins.
• Do not completely isolate the analog/audio ground plane from the rest of the board ground plane.
There should be a single point (0.25 inches to 0.5 inches wide) where the analog/isolated ground
plane connects to the main ground plane. The split between planes must be a minimum of
0.05 inches wide.
• Any signals entering or leaving the analog area must cross the ground split in the area where the
analog ground is attached to the main motherboard ground. That is, no signal should cross the
split/gap between the ground planes, which would cause a ground loop, thereby greatly increasing
EMI emissions and degrading the analog and digital signal quality.
• Analog power and signal traces should be routed over the analog ground plane.
• Digital power and signal traces should be routed over the digital ground plane.
• Bypassing and decoupling capacitors should be close to the IC pins, or positioned for the shortest
connections to pins, with wide traces to reduce impedance.
• All resistors in the signal path or on the voltage reference should be metal film. Carbon resistors can
be used for DC voltages and the power supply path, where the voltage coefficient, temperature
coefficient, and noise are not factors.
• Regions between analog signal traces should be filled with copper, which should be electrically
attached to the analog ground plane. Regions between digital signal traces should be filled with
copper, which should be electrically attached to the digital ground plane.
• Locate the crystal or oscillator close to the codec.
Clocking is provided from the primary codec on the link via BITCLK, and it is derived from a
24.576 MHz crystal or oscillator. Refer to the primary codec vendor for the crystal or oscillator
requirements. BITCLK is a 12.288 MHz clock driven by the primary codec to the digital controller
(ICH2) and by any other codec present. The clock is used as the time base for latching and driving data.