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AMD Geode™ LX Processors Data Book 221
GeodeLink™ Memory Controller Register Descriptions
33234H
6.2.1.4 GLD Error MSR (GLD_MSR_ERROR)
MSR Address 20002003h
Typ e R /W
Reset Value 00000000_00000000h
GLD_MSR_ERROR Register Map
63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32
RSVD
313029282726252423222120191817161514131211109876543210
ERRVAL[15:1] (RSVD)
ERR_VAL0
ERRMAS[15:1] (RSVD)
ERR_MASK0
GLD_MSR_ERROR Bit Descriptions
Bit Name Description
63:32 RSVD Reserved.
31:17 RSVD Reserved.
16 ERR_VAL0 Error Value 0. Synchronous error flag, sent out with GLIU response packet. Hardware
sets error value; writes of 1 clears the error. The GLMC only implements the ‘type-excep-
tion’ error on bit 16, which is set when the GLIU request’s type field is either an I/O type
or snoop type. This bit will be set on such error condition, regardless of the value of
ERR_MASK0. An asynchronous error is also flagged via the mb_p_err output signal.
Note that when an error condition exists, the response packet that corresponds with the
GLIU request that caused the error may be returned to the GLIU out of order (i.e., ahead
of response data for older, outstanding requests in the GLMC). Moreover, the older, out-
standing requests may return corrupt data. (Default = 0)
15:1 RSVD Reserved.
0 ERR_MASK0 Error Mask 0. Masks the corresponding error in bit 16. The GLMC only implements error
mask 0 that corresponds to error bit 16. This bit masks the reporting of the error event
recorded in bit 16. (Default = 0h)