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AMD Geode™ LX Processors Data Book 387
Display Controller Register Descriptions
33234H
6.6.23.7 BlinkCounter
This register is for simulation and test only.
6.6.23.8 VGALatchSavRes
6.6.23.9 DACIFSavRes
CRTC Index 061h
Typ e RO
Reset Value 00h
BlinkCounter Register Bit Descriptions
Bit Name Description
7:5 RSVD Reserved.
4:0 BLNK_CNT Blink Count. These bits provide a real-time blink counter value. This register is not syn-
chronized to the system clock domain.
CRTC Index 070h
Typ e R /W
Reset Value 00h
VGALatchSavRes Register Bit Descriptions
Bit Name Description
7:0 VGA_LSR VGALatchSavRes. This register is used to save/restore the 32-bit VGA data latch.
When the CRTC index register is written, an internal byte counter is cleared to 0. Four
successive reads or writes to the CRTC data register at this index will return or write
bytes 0 (bits [7:0]), 1 (bits [15:8]), 2 (bits [23:16]), then 3 (bits [31:24]) in sequence.
CRTC Index 071h
Typ e R /W
Reset Value 00h
DACIFSavRes Register Bit Descriptions
Bit Name Description
7:0 DACIFSR DACIFSavRes. This register is used to save/restore the VGA palette interface logic
state. When the CRTC index register is written, an internal byte counter is cleared to 0.
Four successive reads or writes to the CRTC data register at this index will return or write
bytes 0 (bits [7:0]), 1 (bits [15:8]), 2 (bits [23:16]), then 3 (bits [31:24]) in sequence.