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CHAPTER 4 ATM CELL PROCESSOR
Preliminary User’s Manual S15543EJ1V0UM
265
4.8.2.2 Transmit queue
Tx_Ready command has to be issued in order to transmit a packet. However, V
R
4120A doesn’t have to wait Tx
indication before issuing next Tx_Ready command for the same VC. When V
R
4120A issues Tx_Ready command
before completing transmission process for the previous packet, ATM Cell Processor builds Tx Queue for that VC.
Figure 4-25. Structure of the Transmit Queue
Tx VC Table
First
PacketInfo
Last
PacketInfo
PacketInfo
Structure
PacketInfo
Structure
PacketInfo
Structure
(1) Packet info structure
The Maximum number of Packet Info Structure for each VC is 16. However, since total number of Packet Info
Structure is 128, some VC may not obtain 16 Packet Info Structure depend on the queue length of other VCs. When
ATM Cell Processor can not obtain any Packet Info Structure, ATM Cell Processor returns an error indication for
Tx_Ready command.
Figure 4-26. Packet Info Structure
NEXT POINTER
CELL HEADER
PACKET DESCRIPTOR STORAGE
WORD0
WORD1
WORD2
WORD3
CELL HEADER Cell header
PACKET DESCRIPTOR STORAGE Area for temporarily storing the packet descriptor of a packet
NEXT POINTER Address of the next Packet Info structure