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CHAPTER 6 USB CONTROLLER
Preliminary User’s Manual S15543EJ1V0UM
319
6.2.7 U_IMR2 (USB Interrupt Mask Register 2)
This register is used to mask interrupts.
When a bit in this register is set to a ‘1’ and the corresponding bit in the USB General Status Register 2 (Address:
18H) is set to a ‘1’, GSR2 bit in the U_GSR1 will be set to a ‘1’.
Bits Field R/W Default Description
31:22 Reserved R/W 0 Reserved for future use. Writes ‘0’s.
21 FW R/W 0 Frame Number Written:
1 = unmask.
0 = mask.
20 IFN R/W 0 Incorrect Frame Number:
1 = unmask.
0 = mask.
19 IEA R/W 0 Incorrect EndPoint Access:
1 = unmask.
0 = mask.
18 URSM R/W 0 USB Resume:
1 = unmask.
0 = mask.
17 URST R/W 0 USB Reset:
1 = unmask.
0 = mask.
16 USPD R/W 0 USB Suspend:
1 = unmask.
0 = mask.
15:8 Reserved R/W 0 Reserved for future use. Writes ‘0’s.
7 EP2OS R/W 0 Over Size:
1 = unmask.
0 = mask.
6 EP2ED R/W 0 Extra Data on EndPoint2:
1 = unmask.
0 = mask.
5 EP2ND R/W 0 Isochronous Data Corrupted:
1 = unmask.
0 = mask.
4 EP1NT R/W 0 No Token on EndPoint 1:
1 = unmask.
0 = mask.
3 EP1ET R/W 0 Extra Token on EndPoint 1:
1 = unmask.
0 = mask.
2 EP1ND R/W 0 No Data on EndPoint 1:
1 = unmask.
0 = mask.
1ES R/W0Extra SOF:
1 = unmask.
0 = mask.
0SL R/W0SOF Loss:
1 = unmask.
0 = mask.