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CHAPTER 5 ETHERNET CONTROLLER
292
Preliminary User’s Manual S15543EJ1V0UM
5.2.23 En_CAR2 (Carry Register 2)
The bits of this register indicate that an overflow event has occurred in statistics counters. Each bit corresponds to
a counter, and the bit is set to a ‘1’ when the corresponding statistics counter overflow event occurs.
Bits Field R/W Default Description
31 C2XD R/W 0 Status vector overrun bit
30:23 Reserved R/W 0 Reserved for future use. Write 0s.
22 C2IM R/W 0 En_TIME counter carry bit
21 C2CS R/W 0 En_TCSE counter carry bit
20 C2BC R/W 0 En_TNCL counter carry bit
19 C2XC R/W 0 En_TXCL counter carry bit
18 C2LC R/W 0 En_TLCL counter carry bit
17 C2MC R/W 0 En_TMCL counter carry bit
16 C2SC R/W 0 En_TSCL counter carry bit
15 C2XD R/W 0 En_TXDF counter carry bit
14 C2DF R/W 0 En_TDFR counter carry bit
13 C2XF R/W 0 En_TXPF counter carry bit
12 C2TE R/W 0 En_TFCS counter carry bit
11 C2JB R/W 0 En_RJBR counter carry bit
10 C2FG R/W 0 En_RFRG counter carry bit
9 C2OV R/W 0 En_ROVR counter carry bit
8 C2UN R/W 0 En_RUND counter carry bit
7 C2FC R/W 0 En_RFCR counter carry bit
6 C2CD R/W 0 En_RCDE counter carry bit
5 C2FO R/W 0 En_RFLR counter carry bit
4 C2AL R/W 0 En_RALN counter carry bit
3 C2UO R/W 0 En_RXUO counter carry bit
2 C2PF R/W 0 En_RXPF counter carry bit
1 C2CF R/W 0 En_RXCF counter carry bit
0 C2RE R/W 0 En_RFCS counter carry bit