APPENDIX A MIPS III INSTRUCTION SET DETAILS
Preliminary User’s Manual S15543EJ1V0UM
471
DADDIU
Doubleword Add Immediate Unsigned
DADDIU
rs
DADDIU
0 1 1 0 0 1
rt immediate
31 26 25 21 20 16 15 0
655 16
Format:
DADDIU rt, rs, immediate
Description:
The 16-bit
immediate
is sign-extended and added to the contents of general register
rs
to form the result. The
result is placed into general register
rt.
No integer overflow exception occurs under any circumstances.
The only difference between this instruction and the DADDI instruction is that DADDIU never causes an overflow
exception.
Operation:
64 T:
GPR [rt] ← GPR [rs] + (immediate
15
)
48
|| immediate
15...0
Exceptions:
Reserved instruction exception (32-bit user mode/supervisor mode)