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CHAPTER 1 INTRODUCTION
Preliminary User’s Manual S15543EJ1V0UM
41
1.7.6 PCI interface
(1/2)
Pin Name Pin No. I/O Active Level Function
PSCLK V30 I PCI clock
PARBN D26 I PCI arbiter enable
PMODE C27 I PCI mode select (L: host, H: NIC)
PIDSEL U28 I H Initialization device select
PDSEL_B M29 I/OZ L Device select
PER_B L30 I/OZ L Parity error
PFRA_B N29 I/OZ L Cycle frame
PHINT_B B28 I L PCI host interrupt
PINT_B AC30 O L Interrupt_A
PIRY_B N27 I/OZ L Initiator ready
PME_B Y27 OD L Power management event
PRSTO_B B29 O L PCI system reset out
PSERI_B A30 I L System error in
PSERO_B L29 O L System error out
PTRY_B N26 I/OZ L Target ready
PSTP_B M28 I/OZ L Stop request from target
PCBE0_B H28 I/OZ L Bus command and byte enable
PCBE1_B L26 I/OZ L Bus command and byte enable
PCBE2_B N30 I/OZ L Bus command and byte enable
PCBE3_B T30 I/OZ L Bus command and byte enable
PRQO_B Y28 O L Bus request out
PRQI0_B C30 I L Bus request in[0]
PRQI1_B D29 I L Bus request in[1]
PRQI2_B E28 I L Bus request in[2]
PRQI3_B E27 I L Bus request in[3]
PGTI_B AA28 I L Bus grant in
PGTO0_B B30 O L Bus grant out[0]
PGTO1_B C29 O L Bus grant out[1]
PGTO2_B D28 O L Bus grant out[2]
PGTO3_B C28 O L Bus grant out[3]
PAR L28 I/OZ Parity of address/data
PAD0 D30 I/OZ PCI address and data
PAD1 G26 I/OZ PCI address and data
PAD2 E29 I/OZ PCI address and data
PAD3 G27 I/OZ PCI address and data
PAD4 E30 I/OZ PCI address and data
PAD5 F29 I/OZ PCI address and data
PAD6 F30 I/OZ PCI address and data
PAD7 G29 I/OZ PCI address and data
PAD8 G30 I/OZ PCI address and data
PAD9 H29 I/OZ PCI address and data
PAD10 J27 I/OZ PCI address and data