APPENDIX A MIPS III INSTRUCTION SET DETAILS
Preliminary User’s Manual S15543EJ1V0UM
535
NOR
Nor
NOR
rs
SPECIAL
0 0 0 0 0 0
rt rd
0
0 0 0 0 0
NOR
1 0 0 1 1 1
31 26 25 21 20 16 15 11 10 6 5 0
6 5555 6
Format:
NOR rd, rs, rt
Description:
The contents of general register
rs
are combined with the contents of general register
rt
in a bit-wise logical NOR
operation. The result is placed into general register
rd
.
Operation:
32, 64 T:
GPR [rd] ← GPR [rs] nor GPR [rt]
Exceptions:
None