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AMD Geode™ LX Processors Data Book 117
CPU Core Register Descriptions
33234H
6STRONG Strong Prediction. Allow the IF to make strong predictions.
0: Disable.
1: Enable. (Default)
Note: Enabling strong predictions may improve performance.
5 RSVD Reserved.
4RS Return Stack.
0: Disable.
1: Enable. (Default)
Note: Enabling the return stack increases performance unless CC_L1 is enabled (bit 0
= 1), then the return stack has no effect.
3 RSVD Reserved.
2 CC_INVL COF Cache Invalidation.
0: Translation Look-aside Buffer (TLB) invalidations do not invalidate the COF cache.
(Default)
1: Whenever the TLB is invalidated, the COF cache is also invalidated.
Note: Invalidating the COF cache whenever the TLB is invalidated may reduce perfor-
mance.
1 RSVD Reserved.
0 CC_L1 Level-1 COF Cache.
0: Disable.
1: Enable. (Default)
Note: Enabling the L1 COF cache increases performance.
IF_CONFIG_MSR Bit Descriptions (Continued)
Bit Name Description