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AMD Geode™ LX Processors Data Book 141
CPU Core Register Descriptions
33234H
5.5.2.35 Extended Debug Registers 11 and 10 MSR (XDR11_XDR10_MSR)
XDR11_XDR10_MSR provides access to the extended I/O breakpoint.
5.5.2.36 EX Stage Instruction Pointer MSR (EX_IP_MSR)
EX_IP_MSR provides access to the EX stage instruction pointer (effective address).
MSR Address 00001355h
Typ e R /W
Reset Value xxxxxxxx_xxxx0000h
XDR11_XDR10_MSR Register Map
63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32
RSVD
313029282726252423222120191817161514131211109876543210
RSVD IO_PORT
XDR11_XDR10_MSR Bit Descriptions
Bit Name Description
63:16 RSVD Reserved. These bits are not writable.
15:0 IO_PORT I/O Port for Extended I/O Breakpoint 6.
MSR Address 00001360h
Typ e R /W
Reset Value 00000000_00000000h
EX_IP_MSR Register Map
63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32
RSVD
313029282726252423222120191817161514131211109876543210
EX_IP
EX_IP_MSR Bit Descriptions
Bit Name Description
63:32 RSVD Reserved.
31:0 EX_IP EX Stage Effective Instruction Pointer.