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142 AMD Geode™ LX Processors Data Book
CPU Core Register Descriptions
33234H
5.5.2.37 WB Stage Instruction Pointer MSR (WB_IP_MSR)
WB_IP_MSR provides access to the WB stage instruction pointer (effective address).
5.5.2.38 EX Stage Linear Instruction Pointer MSR (EX_LIP_MSR)
EX_LIP_MSR provides access to the EX stage linear instruction pointer.
MSR Address 00001361h
Typ e R /W
Reset Value 00000000_00000000h
WB_IP_MSR Register Map
63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32
RSVD
313029282726252423222120191817161514131211109876543210
WB_IP
WB_IP_MSR Bit Descriptions
Bit Name Description
63:32 RSVD Reserved.
31:0 WB_IP WB Stage Effective Instruction Pointer.
MSR Address 00001364h
Typ e RO
Reset Value 00000000_00000000h
EX_LIP_MSR Register Map
63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32
RSVD
313029282726252423222120191817161514131211109876543210
EX_LIP
EX_LIP_MSR Bit Descriptions
Bit Name Description
63:32 RSVD Reserved.
31:0 EX_LIP EX Stage Linear Instruction Pointer.