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AMD Geode™ LX Processors Data Book 299
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33234H
Table 6-44. Timing Register Settings for Interlaced Modes
Timing Set Parameter Odd Register Even Register
Formula
V_Active_End (odd_active-1) (even_active-1)
V_Total (odd_active + odd_fp + even_bp - 1) (even_active + even_fp + odd_bp - 1)
V_Sync_Start (odd_active + odd_fp - 1) (even_active + even_fp - 1)
V_Sync_End (odd_active + odd_fp + odd_vsync - 1) (even_active +even_fp + even_vsync - 1)
525
V_Active_End F1 F0
V_Total 106 105
V_Sync_Start F5 F5
V_Sync_End F6 F6
625
V_Active_End 11F 11F
V_Total 138 137
V_Sync_Start 121 121
V_Sync_End 122 122
720i
V_Active_End 167 167
V_Total 177 177
V_Sync_Start 16A 169
V_Sync_End 16B 16A
1080i
V_Active_End 21B 21B
V_Total 232 231
V_Sync_Start 21E 21D
V_Sync_End 21F 21E
1080i 50 Hz
V_Active_End 21B 21B
V_Total 270 270
V_Sync_Start 220 220
V_Sync_End 221 221