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AMD Geode™ LX Processors Data Book 153
CPU Core Register Descriptions
33234H
5.5.2.54 Instruction Cache Tag (IC_TAG_MSR)
MSR Address 00001712h
Typ e R /W
Reset Value 00000000_00000000h
IC_TAG_MSR MSR Register Map
63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32
RSVD LRU
313029282726252423222120191817161514131211109876543210
TAG RSVD V
IC_TAG_MSR Bit Descriptions
Bits Name Description
63:47 RSVD (RO) Reserved (Read Only).
46:32 LRU Least Recently Used Bits for the Cache Line. Same data will be read for all ways in a
line. If bit(s) are set to 1:
Bit 46: Ways (15-8) more recent than ways (7-0)
Bit 45: Ways (15-12) more recent than ways (11-8)
Bit 44: Ways (15,14) more recent than ways (13,12)
Bit 43: Way 15 more recent than way 14
Bit 42: Way 13 more recent than way 12
Bit 41: Ways (11,10) more recent than ways (9,8)
Bit 40: Way 11 more recent than way 10
Bit 39: Way 9 more recent than way 8
Bit 38: Ways (7-4) more recent than ways (3-0)
Bit 37: Ways (7,6) more recent than ways (5,4)
Bit 36: Way 7 more recent than way 6
Bit 35: Way 5 more recent than way 4
Bit 34: Ways (2,3) more recent than ways (1,0)
Bit 33: Way 3 more recent than way 2
Bit 32: Way 1 more recent than way 0
31:12 TAG Tag. Cache tag value for the line/way selected by IC_INDEX_MSR (MSR 00001710h).
(Default = 0)
11:1 RSVD (RO) Reserved (Read Only).
0V Valid. Valid bit for the line/way selected by IC_INDEX_MSR (MSR 00001710h).
(Default = 0)