Filter
Top Products
118 AMD Geode™ LX Processors Data Book
CPU Core Register Descriptions
33234H
5.5.2.10 IF Invalidate MSR (IF_INVALIDATE_MSR)
IF_INVALIDATE MSR may be used to invalidate the contents of the Tag RAMs (Level-1 COF cache), Level-0 COF cache,
and the return stack. Devices external to the CPU should issue writes to IF_INVALIDATE_MSR only if the CPU is sus-
pended or stalled.
5.5.2.11 IF Test Address MSR (IF_TEST_ADDR_MSR)
IF_TEST_ADDR_MSR is used to indirectly address the IF state elements, while IF_TEST_DATA_MSR (MSR 0000109h) is
used to read/write the elements. The format of the data written to, or read from IF_TEST_DATA_MSR depends on the value
in IF_TEST_ADDR MSR.
MSR Address 00001102h
Typ e W
Reset Value 00000000_00000000h
IF_INVALIDATE_MSR Register Map
63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32
RSVD
313029282726252423222120191817161514131211109876543210
RSVD RS CC
IF_INVALIDATE_MSR Bit Descriptions
Bit Name Description
63:2 RSVD Reserved.
1RS Invalidate Return Stack.
0: Do not alter the return stack. (Default)
1: Empty the return stack.
0CC Invalidate L0 and L1 COF Cache.
0: Do not alter the COF cache. (Default)
1: Empty the COF cache.
MSR Address 00001108h
Typ e R /W
Reset Value 00000000_00000000h
IF_TEST_ADDR_MSR Register Map
63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32
RSVD
313029282726252423222120191817161514131211109876543210
RSVD BLOCK INDEX
IF_TEST_ADDR_MSR Bit Descriptions
Bit Name Description
63:13 RSVD Reserved.