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AMD Geode™ LX Processors Data Book 71
GLIU Register Descriptions
33234H
4.2.3 GLIU Statistic and Comparator MSRs
4.2.3.1 Descriptor Statistic Counter (STATISTIC_CNT[0:3])
Descriptor Statistic Counter (STATISTIC_CNT[0])
Descriptor Statistic Counter (STATISTIC_CNT[1])
Descriptor Statistic Counter (STATISTIC_CNT[2])
Descriptor Statistic Counter (STATISTIC_CNT[3])
MSR Address GLIU0: 100000A0h
GLIU1: 400000A0h
Type R/W
Reset Value 00000000_00000000h
MSR Address GLIU0: 100000A4h
GLIU1: 400000A4h
Type R/W
Reset Value 00000000_00000000h
MSR Address GLIU0: 100000A8h
GLIU1: 400000A8h
Type R/W
Reset Value 00000000_00000000h
MSR Address GLIU0: 100000ACh
GLIU1: 400000ACh
Type R/W
Reset Value 00000000_00000000h
STATISTIC_CNT[0:3] Registers Map
63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32
LOAD_VAL
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
CNT
STATISTIC_CNT[0:3] Bit Descriptions
Bit Name Description
63:32 LOAD_VAL Counter Load Value. The value loaded here is used as the initial Statistics Counter
value when a LOAD action occurs or is commanded.
31:0 CNT Counter Value. These bits provide the current counter value when read.