Filter
Top Products
AMD Geode™ LX Processors Data Book 289
Display Controller
33234H
6.5.5.2 Graphics Controller
The graphics controller manages the CPU interaction with
video memory, and contains the video serializers that feed
the front end of the attribute controller. Several memory
read and write modes are supported that provide various
forms of acceleration for VGA graphics operations. A high-
level diagram of the graphics controller is shown in Figure
6-16.
Figure 6-16. Graphics Controller High-level Diagram
Memory Map 3 Data
Memory Map 2 Data
Memory Map 1 Data
Memory Map 0 Data
Write
Read
M
Serializers
CPU Data
PIX Out
Character Gen Data
Attribute Byte
Each bus is 8 bits except for PIX Out,
Video
Mode
Mode
Latch
U
X
which is 4 bits.
Note: