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AMD Geode™ LX Processors Data Book 67
GLIU Register Descriptions
33234H
4.2.2.8 N Outstanding Write Data (NOUT_WDATA)
4.2.2.9 SLAVE_ONLY
MSR Address GLIU0: 10000088h
GLIU1: 40000088h
Typ e RO
Reset Value 00000000_00000000h
NOUT_WDATA Register Map
63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32
NOUT_WDATA7 NOUT_WDATA6 NOUT_WDATA5 NOUT_WDATA4
313029282726252423222120191817161514131211109876543210
NOUT_WDATA3 NOUT_WDATA2 NOUT_WDATA1 NOUT_WDATA0
NOUT_WDATA Bit Descriptions
Bit Name Description
63:56 NOOUT_WDATA7 Number of Outstanding Write Data on Port 7. (GLIU0 = Not Used; GLIU1 = Not
Used.)
55:48 NOOUT_WDATA6 Number of Outstanding Write Data on Port 6. (GLIU0 = Not Used; GLIU1 = SB.)
47:40 NOOUT_WDATA5 Number of Outstanding Write Data on Port 5. (GLIU0 = GP; GLIU1 = VIP.)
39:32 NOOUT_WDATA4 Number of Outstanding Write Data on Port 4. (GLIU0 = DC; GLIU1 = GLPCI.)
31:24 NOOUT_WDATA3 Number of Outstanding Write Data on Port 3. (GLIU0 = CPU Core; GLIU1 =
GLCP.)
23:16 NOOUT_WDATA2 Number of Outstanding Write Data on Port 2. (GLIU0 = Interface to GLIU1; GLIU1
= VP.)
15:8 NOOUT_WDATA1 Number of Outstanding Write Data on Port 1. (GLIU0 = GLMC; GLIU1 = Interface
to GLIU0.)
7:0 NOOUT_WDATA0 Number of Outstanding Write Data on Port 0. (GLIU0 = GLIU; GLIU1 = GLIU.)
MSR Address GLIU0: 10000089h
GLIU1: 40000089h
Typ e RO
Reset Value GLIU0: 00000000_00000010h
GLIU1: 00000000_00000100h
SLAVE_ONLY Register Map
63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32
RSVD
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
RSVD SLAVE_ONLY
SLAVE_ONLY Bit Descriptions
Bit Name Description
63:8 RSVD Reserved.
7 P7_SLAVE_ONLY Port 7 Slave Only. (GLIU0 = Not Used; GLIU1 = Not Used.) If high, indicates that Port
7 is a slave port. If low, Port 7 is a master/slave port.