Texas Instruments SM320C6455-EP Personal Computer User Manual


 
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7.4EnhancedDirectMemoryAccess(EDMA3)Controller
SM320C6455-EP
FIXED-POINTDIGITALSIGNALPROCESSOR
SPRS462BSEPTEMBER2007REVISEDJANUARY2008
TheprimarypurposeoftheEDMA3istoserviceuser-programmeddatatransfersbetweentwo
memory-mappedslaveendpointsonthedevice.TheEDMA3servicessoftware-drivenpagingtransfers
(e.g.,datamovementbetweenexternalmemoryandinternalmemory),performssortingorsubframe
extractionofvariousdatastructures,serviceseventdrivenperipheralssuchasaMcBSPortheUTOPIA
port,andoffloadsdatatransfersfromthedeviceCPU.
TheEDMA3includesthefollowingfeatures:
Fullyorthogonaltransferdescription
Threetransferdimensions:array(multiplebytes),frame(multiplearrays),andblock(multiple
frames)
Singleeventcantriggertransferofarray,frame,orentireblock
Independentindexesonsourceanddestination
Flexibletransferdefinition:
IncrementorFIFOtransferaddressingmodes
Linkingmechanismallowsforping-pongbuffering,circularbuffering,andrepetitive/continuous
transfers,allwithnoCPUintervention
Chainingallowsmultipletransferstoexecutewithoneevent
256PaRAMentries
Usedtodefinetransfercontextforchannels
EachPaRAMentrycanbeusedasaDMAentry,QDMAentry,orlinkentry
64DMAchannels
Manuallytriggered(CPUwritestochannelcontrollerregister),externaleventtriggered,andchain
triggered(completionofonetransfertriggersanother)
FourQuickDMA(QDMA)channels
Usedforsoftware-driventransfers
TriggereduponwritingtoasinglePaRAMsetentry
Fourtransfercontrollers/eventqueueswithprogrammablesystem-levelpriority
Interruptgenerationfortransfercompletionanderrorconditions
Memoryprotectionsupport
ActivememoryprotectionforaccessestoPaRAMandregisters
Debugvisibility
Queuewatermarking/thresholdallowsdetectionofmaximumusageofeventqueues
Errorandstatusrecordingtofacilitatedebug
Eachofthetransfercontrollershasadirectconnectiontotheswitchedcentralresource(SCR).
NOTE
AlthoughthetransfercontrollersaredirectlyconnectedtotheSCR,theycanaccessonly
certaindeviceresources.Forexample,onlytransfercontroller1(TC1)canaccessthe
McBSPs.Table4-1liststhedeviceresourcesthatcanbeaccessedbyeachofthe
transfercontrollers.
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