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7.8.3.5PLLDIVRatioChangeStatusRegister
SM320C6455-EP
FIXED-POINTDIGITALSIGNALPROCESSOR
SPRS462B–SEPTEMBER2007–REVISEDJANUARY2008
WheneveradifferentratioiswrittentothePLLDIV1register,thePLLCTRLflagsthechangeinthe
DCHANGEstatusregister.DuringtheGOoperation,thePLLcontrollerwillonlychangethedivideratio
SYSCLK1ifSYS1inDCHANGEis1.ThePLLDIVdividerratiochangestatusregisterisshownin
Figure7-28anddescribedinTable7-37.
3116
Reserved
R-0
1510
ReservedSYS1
R-0R-0
LEGEND:R/W=Read/Write;R=Readonly;-n=valueafterreset
Figure7-28.PLLDIVDividerRatioChangeStatusRegister(DCHANGE)[HexAddress:029C0144]
Table7-37.PLLDIVDividerRatioChangeStatusRegister(DCHANGE)FieldDescriptions
BitFieldValueDescription
31:1Reserved0Reserved.Thereservedbitlocationisalwaysreadas0.Avaluewrittentothisfieldhasnoeffect.
0SYS1SYSCLK1divideratiohasbeenmodified.SYSCLK1ratiowillbemodifiedduringGOoperation.
0SYSCLK1ratiohasnotbeenmodified.WhenGOSETisset,SYSCLK1willnotbeaffected.
1SYSCLK1ratiohasbeenmodified.WhenGOSETisset,SYSCLK1willchangetothenewratio.
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