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SM320C6455-EP
FIXED-POINTDIGITALSIGNALPROCESSOR
SPRS462B–SEPTEMBER2007–REVISEDJANUARY2008
Table2-3.TerminalFunctions(continued)
SIGNAL
TYPE
(1)
IPD/IPU
(2)
DESCRIPTION
NAMENO.
URDATA7/MRXD7M2
URDATA6/MRXD6H2
UTOPIA8bitReceiveDataBus(I)[default]orEMACreceivedatabusforMII
URDATA5/MRXD5L2
[default],RMII,orGMII
URDATA4/MRXD4L1
UsingtheReceiveDataBus,theUTOPIASlave(ontherisingedgeofthe
URCLK)canreceivethe8bitATMcelldatafromtheMasterATMController.
URDATA3/MRXD3J3
I
URDATA2/MRXD2J1
WhentheUTOPIAperipheralisdisabled(UTOPIA_EN[AEA12pin]=0),these
pinsfunctionasEMACreceivedatapinsforMII[default],RMII,orGMII
URDATA1/MRXD1/
H3
(MRXD[x:0])(I).MACSEL[1:0]dependent.
RMRXD1
URDATA0/MRXD0/
J2
RMRXD0
TransmitcellavailablestatusoutputsignalfromUTOPIAslave(O).
•0indicatesacompletecellisNOTavailablefortransmit
•1indicatesacompletecellisavailablefortransmit
UXCLAV/GMTCLKK5O/Z
WhentheUTOPIAperipheralisdisabled(UTOPIA_EN[AEA12pin]=0),this
pinisEMACGMIItransmitclock(GMTCLK)(O).MACSEL[1:0]dependent.
UTOPIAtransmitsourceclock(UXCLK)drivenbyMasterATMController(I)or
whentheUTOPIAperipheralisdisabled(UTOPIA_EN[AEA12pin]=0),this
UXCLK/MTCLK/piniseitherEMACMII[default]orGMIItransmitclock(MTCLK)(I)orthe
N4I
RMREFCLKEMACRMIIreferenceclock(RMREFCLK)(I).TheEMACfunctioniscontrolled
bytheMACSEL[1:0](AEA[10:9]pins).Formoredetailedinformation,see
Section3,DeviceConfiguration.
UTOPIAtransmitStart-of-Cellsignal(O).ThissignalisoutputbytheUTOPIA
SlaveontherisingedgeoftheUXCLK,indicatingthatthefirstvalidbyteofthe
cellisavailableonthe8bitTransmitDataBus(UXDATA[7:0]).
UXSOC/MCOLK3I/O/Z
WhentheUTOPIAperipheralisdisabled(UTOPIA_EN[AEA12pin]=0),this
pinistheEMACcollisionsense(MCDL)(I)forMII[default]orGMII.
MACSEL[1:0]dependent.
UTOPIAtransmitinterfaceenableinputsignal[default](I)orwhentheUTOPIA
UXENB/MTXEN/peripheralisdisabled(UTOPIA_EN[AEA12pin]=0),thispiniseitherthe
J5I/O/Z
RMTXENEMACtransmitenable(MTXEN)(O)forMII[default],RMII,orGMII.
MACSEL[1:0]dependent.
UXDATA7/MTXD7N5
UXDATA6/MTXD6M3
UTOPIA8bittransmitdatabus(O)[default]orEMACtransmitdatabusforMII
UXDATA5/MTXD5L5
[default],RMII,orGMII.
UXDATA4/MTXD4L3
UsingtheTransmitDataBus,theUTOPIASlave(ontherisingedgeofthe
UXDATA3/MTXD3K4
O/ZUXCLK)transmitsthe8bitATMcellstotheMasterATMController.
UXDATA2/MTXD2M4
WhentheUTOPIAperipheralisdisabled(UTOPIA_EN[AEA12pin]=0),these
UXDATA1/MTXD1/pinsfunctionasEMACtransmitdatapins(MTXD[x:0])(O)forMII,RMII,or
L4
RMTXD1GMII.MACSEL[1:0]dependent.
UXDATA0/MTXD0/
M1
RMTXD0
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