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2.2CPU(DSPCore)Description
SM320C6455-EP
FIXED-POINTDIGITALSIGNALPROCESSOR
SPRS462B–SEPTEMBER2007–REVISEDJANUARY2008
Table2-1.CharacteristicsoftheC6455Processor(continued)
HARDWAREFEATURESC6455
ProcessTechnologyµm0.09µm
ProductPreview(PP),AdvanceInformation(AI),
ProductStatus
(2)
PD
orProductionData(PD)
TMS320C6455ZTZ7,
(FormoredetailsontheC64x+™DSPpart
DevicePartNumbersTMS320C6455ZTZ8,
numbering,seeFigure2-13)
TMS320C6455ZTZ
(2)PRODUCTIONDATAinformationiscurrentasofpublicationdate.ProductsconformtospecificationsperthetermsofTexas
Instrumentsstandardwarranty.Productionprocessingdoesnotnecessarilyincludetestingofallparameters.
TheC64x+CentralProcessingUnit(CPU)consistsofeightfunctionalunits,tworegisterfiles,andtwo
datapathsasshowninFigure2-1.Thetwogeneral-purposeregisterfiles(AandB)eachcontain
thirty-two32bitregistersforatotalof64registers.Thegeneral-purposeregisterscanbeusedfordataor
canbedataaddresspointers.Thedatatypessupportedincludepacked8bitdata,packed16bitdata,32
bitdata,40bitdata,and64bitdata.Valueslargerthan32bits,suchas40bit-longor64bit-longvalues
arestoredinregisterpairs,withthe32LSBsofdataplacedinanevenregisterandtheremaining8or
32MSBsinthenextupperregister(whichisalwaysanodd-numberedregister).
Theeightfunctionalunits(.M1,.L1,.D1,.S1,.M2,.L2,.D2,and.S2)areeachcapableofexecutingone
instructioneveryclockcycle.The.Mfunctionalunitsperformallmultiplyoperations.The.Sand.Lunits
performageneralsetofarithmetic,logical,andbranchfunctions.The.Dunitsprimarilyloaddatafrom
memorytotheregisterfileandstoreresultsfromtheregisterfileintomemory.
TheC64x+CPUextendstheperformanceoftheC64xcorethroughenhancementsandnewfeatures.
EachC64x+.Munitcanperformoneofthefollowingeachclockcycle:one32x32bitmultiply,two
16x16bitmultiplies,two16x32bitmultiplies,four8x8bitmultiplies,four8x8bitmultiplieswithadd
operations,andfour16x16multiplieswithadd/subtractcapabilities(includingacomplexmultiply).There
isalsosupportforGaloisfieldmultiplicationfor8bitand32bitdata.Manycommunicationsalgorithms
suchasFFTsandmodemsrequirecomplexmultiplication.Thecomplexmultiply(CMPY)instructiontakes
for16bitinputsandproducesa32bitrealanda32bitimaginaryoutput.Therearealsocomplex
multiplieswithroundingcapabilitythatproducesone32bitpackedoutputthatcontain16bitrealand16
bitimaginaryvalues.The32x32bitmultiplyinstructionsprovidetheextendedprecisionnecessaryfor
audioandotherhigh-precisionalgorithmsonavarietyofsignedandunsigned32bitdatatypes.
The.Lor(ArithmeticLogicUnit)nowincorporatestheabilitytodoparalleladd/subtractoperationsona
pairofcommoninputs.Versionsofthisinstructionexisttoworkon32bitdataoronpairsof16bitdata
performingdual16bitaddandsubtractsinparallel.Therearealsosaturatedformsoftheseinstructions.
TheC64x+coreenhancesthe.Sunitinseveralways.IntheC64xcore,dual16bitMIN2andMAX2
comparisonswereavailableonlyonthe.Lunits.OntheC64x+coretheyalsoareavailableonthe.Sunit,
whichincreasestheperformanceofalgorithmsthatdosearchingandsorting.Finally,toincreasedata
packingandunpackingthroughput,the.Sunitallowssustainedhighperformanceforthequad8bit/16bit
anddual16bitinstructions.Unpackinstructionsprepare8bitdataforparallel16bitoperations.Pack
instructionsreturnparallelresultstooutputprecisionincludingsaturationsupport.
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