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SM320C6455-EP
FIXED-POINTDIGITALSIGNALPROCESSOR
SPRS462B–SEPTEMBER2007–REVISEDJANUARY2008
Table2-3.TerminalFunctions(continued)
SIGNAL
TYPE
(1)
IPD/IPU
(2)
DESCRIPTION
NAMENO.
EMIFA(64BIT)-ADDRESS
AEA19/BOOTMODE3N25EMIFAexternaladdress(wordaddress)(O/Z)
ControlsinitializationoftheDSPmodesatreset(I)viapullup/pulldownresistors
AEA18/BOOTMODE2L26
[Formoredetailedinformation,seeSection3,DeviceConfiguration.]
AEA17/BOOTMODE1L25
Note:Ifaconfigurationpinmustberoutedoutfromthedeviceand3-stated
O/ZIPD
(notdriven),theinternalpullup/pulldown(IPU/IPD)resistorshouldnotberelied
AEA16/BOOTMODE0P26
upon;TIrecommendstheuseofanexternalpullup/pulldownresistor.Formore
AEA15/AECLKIN_SELP27
detailedinformationonpullup/pulldownresistorsandsituationswhereexternal
pullup/pulldownresistorsarerequired,seeSection3.7,Pullup/Pulldown
AEA14/HPI_WIDTHR25
Resistors.
AEA13/LENDIANR27O/ZIPU
•Bootmode-devicebootmodeconfigurations(BOOTMODE[3:0])[Note:
AEA12/UTOPIA_ENR28
theperipheralmustbeenabledtousetheparticularbootmode.]
AEA[19:16]:
0000-Noboot(defaultmode)
0001-Hostboot(HPI)
0010-Reserved
0011-Reserved
0100-EMIFA8bitROMboot
0101-MasterI2Cboot
0110-SlaveI2Cboot
0111-Hostboot(PCI)
1000thru1111-SerialRapidI/Obootconfigurations
Formoredetailedinformationonthebootmodes,seeSection2.4,Boot
Sequence.
CFGGP[2:0]pinsmustbesetto000bduringresetforproperoperationof
thePCIbootmode.
•EMIFAinputclocksourceselect
ClockmodeselectforEMIFA(AECLKIN_SEL)
AEA15:
0-AECLKIN(defaultmode)
1-SYSCLK4(CPU/x)ClockRate.TheSYSCLK4clockrateissoftware
selectableviatheSoftwarePLL1Controller.Bydefault,SYSCLK4is
selectedasCPU/8clockrate.
•HPIperipheralbuswidth(HPI_WIDTH)select
O/ZIPD
[AppliesonlywhenHPIisenabled;PCI_ENpin=0]
AEA11T25
AEA14:
0-HPIoperatesasanHPI16(default).(HPIbusis16bitswide.HD[15:0]
pinsareusedandtheremainingHD[31:16]pinsarereservedpinsinthe
Hi-Zstate.)
1-HPIoperatesasanHPI32.
•DeviceEndianmode(LENDIAN)
AEA13:
0-SystemoperatesinBigEndianmode
1-SystemoperatesinLittleEndianmode(default)
•UTOPIAEnablebit(UTOPIA_EN)
AEA12:UTOPIAperipheralenable(functional)
0-UTOPIAdisabled;EthernetMAC(EMAC)andMDIOenable(default).
ThismeansallmultiplexedEMAC/UTOPIAandMDIO/UTOPIApins
functionasEMACandMDIO.WhichEMAC/MDIOconfiguration(interface)
[MII,RMII,GMIIorthestandaloneRGMII]iscontrolledbythe
MACSEL[1:0]bits.
1-UTOPIAenabled;EMACandMDIOdisabled[exceptwhenthe
MACSEL[1:0]bits=11then,theEMAC/MDIORGMIIinterfaceisstill
functional].
ThismeansallmultiplexedEMAC/UTOPIAandMDIO/UTOPIApinsnow
functionasUTOPIA.AndifMACSEL[1:0]=11,theRGMIIstandalonepin
functionscanbeused.
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