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7.19UTOPIA
7.19.1UTOPIADevice-SpecificInformation
7.19.2UTOPIAPeripheralRegisterDescription(s)
SM320C6455-EP
FIXED-POINTDIGITALSIGNALPROCESSOR
SPRS462B–SEPTEMBER2007–REVISEDJANUARY2008
TheUniversalTestandOperationsPHYInterfaceforATM(UTOPIA)peripheralisa50MHz,8Bit
Slave-onlyinterface.TheUTOPIAismoresimplisticthantheEthernetMAC,inthattheUTOPIAis
serviceddirectlybytheEDMA3controller.TheUTOPIAperipheralcontainstwo,two-cellFIFOs,onefor
transmitandoneforreceive,withwhichtobufferupdatasent/receivedacrossthepins.Thereisa
transmitandareceiveeventtotheEDMA3channelcontrollertoenableservicing.
FormoredetailedinformationontheUTOPIAperipheral,seetheTMS320C645xDSPUniversalTestand
OperationsPHYInterfaceforATM2(UTOPIA2)User'sGuide(literaturenumberSPRUE48).
Table7-104.UTOPIARegisters
HEXADDRESSRANGEACRONYMREGISTERNAME
02B40000UCRUTOPIAControlRegister
02B40004-Reserved
02B40008-Reserved
02B4000C-Reserved
02B40010-Reserved
02B40014CDRClockDetectRegister
02B40018EIERErrorInterruptEnableRegister
02B4001CEIPRErrorInterruptPendingRegister
02B40020-02B401FF-Reserved
02B40200-02B7FFFF-Reserved
Table7-105.UTOPIADataQueues(ReceiveandTransmit)Registers
HEXADDRESSRANGEACRONYMREGISTERNAME
3C000000-3C0003FFURQUTOPIAReceive(Rx)DataQueue
3C000400-3C0007FFUXQUTOPIATransmit(Tx)DataQueue
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