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7.8.4PLL2ControllerInputClockElectricalData/Timing
CLKIN2
2
3
4
4
5
1
SM320C6455-EP
FIXED-POINTDIGITALSIGNALPROCESSOR
SPRS462B–SEPTEMBER2007–REVISEDJANUARY2008
Table7-39.TimingRequirementsforCLKIN2
(1)(2)(3)
(seeFigure7-30)
-720
-850
A-1000/-1000
NO.UNIT
-1200
MINMAX
1t
c(CLKIN2)
Cycletime,CLKIN237.580ns
2t
w(CLKIN2H)
Pulseduration,CLKIN2high0.4Cns
3t
w(CLKIN2L)
Pulseduration,CLKIN2low0.4Cns
4t
t(CLKIN2)
Transitiontime,CLKIN21.2ns
5t
J(CLKIN2)
Periodjitter(peak-to-peak),CLKIN2100ps
(1)Thereferencepointsfortheriseandfalltransitionsaremeasuredat3.3VV
IL
MAXandV
IH
MIN.
(2)C=CLKIN2cycletimeinns.Forexample,whenCLKIN2frequencyis25MHz,useC=40ns.
(3)IfEMACisenabledwithRGMIIorGMII,CLKIN2cycletimemustbe40ns(25MHz).
Figure7-30.CLKIN2Timing
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