Filter
Top Products
21555 Non-Transparent PCI-to-PCI Bridge User Manual 115
I2O Support
processor removes the message from the Inbound Post_List, it must write bit 31 of the Inbound
Post_List counter with a 0, which causes the 21555 to decrement the Inbound Post_List counter by 1. When the
counter decrements to zero, the 21555 deasserts s_inta_l, indicating that there are no more posted MFAs in the
Inbound Queue.
Once the local processor consumes the inbound message from the host, it replaces the empty MFA onto the end of
the Inbound Free_List. Again, the 21555 does not manage the pointers for this operation, so the local processor
must manage this in software. However, the local processor manages the 21555’s Inbound Free_List Counter when
it replaces an empty MFA. When the local processor replaces the empty MFA to the Inbound Free_List, it must
write bit 31 of the Inbound Free_List Counter with a zero, which causes the 21555 to increment the
Inbound Free_List Counter by 1.
14.2 Outbound Message Passing
An outbound message is passed from the local processor to the host processor in the following steps:
1. The local processor removes an empty MFA, if available, from the head of the Outbound Free_List.
2. The local processor posts an MFA containing the address of the message frame to the tail of the Outbound
Post_List.
3. The I2O Controller interrupts the host processor, indicating that an MFA exists in the Outbound Post_List.
4. The host processor retrieves the MFA from the head of the Outbound Post_List.
5. After the host processor consumes the message, it replaces the empty MFA onto the tail of the Outbound
Free_List.
The 21555 implements the following hardware for the Outbound Queue:
• Table 86, “I2O Outbound Queue” on page 166 register at CSR offset 44h.
• Table 89, “I2O Outbound Free_List Tail Pointer” on page 167 at CSR offset 50h.
• Table 90, “I2O Outbound Post_List Head Pointer” on page 167 at CSR offset 54h.
• Table 93, “I2O Outbound Post_List Counter” on page 169 at CSR offset 60h.
• Table 94, “I2O Outbound Free_List Counter” on page 169 at CSR offset 64h.
• Table 81, “I2O Outbound Post_List Status” on page 165at CSR offset 30h.
• Table 82, “I2O Outbound Post_List Interrupt Mask” on page 165 at CSR offset 34h.
When the local processor has a message to pass to the host processor, it must remove an empty MFA from the head
of the Outbound Free_List. The 21555 does not implement outbound queue pointers that are used by the local
processor. However, the local processor manages the 21555’s Outbound Free_List counter when it removes an
empty MFA. When the local processor removes the empty MFA from the Outbound Free_List, it must write bit
31of the Outbound Free_List counter to a zero, causing the 21555 to decrement the Outbound Free_List counter by
1. The 21555 does not use the value of this counter internally, but makes this function available to track the number
of empty MFAs in the Outbound Free_List
When the local processor posts a message to the Outbound Post_List, it must write bit 31 of the Outbound
Post_List Counter to a zero, which causes the 21555 to increment the counter by 1. A non-zero value in the
Outbound Post_List Counter indicates that the Outbound Post_List contains MFAs intended for the host processor.
When the Outbound Post_List Mask bit is zero, upon detection of a non-zero value in the Outbound Post_List
counter or if the onchip outbound prefetch buffer is not empty, the 21555 sets the Outbound Post_List status to 1