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20 21555 Non-Transparent PCI-to-PCI Bridge User Manual
Introduction
2.3 Special Applications
2.3.1 Primary Bus VGA Support
The 21555 provides hardware support that allows configuration of itself as a Video Graphics Adapter (VGA)
device. The primary class code should be preloaded through the serial ROM (SROM) or loaded by the local
processor with the value for a VGA device (Base Class 03h, Sub-Class 00h, Programming Interface 00h). This
allows the 21555 to present itself to the host as a VGA device.
The VGA Mode field in the Chip 0 Control register (see page 156) should be set to 01b to enable decoding of VGA
transactions on the primary bus for forwarding to the secondary bus. These bits can be set through SROM preload,
or either from a primary or secondary bus configuration write. Table 4 gives addresses that are decoded.
The 21555 cannot be enabled as a snooping agent on the primary bus. This is because the 21555 cannot guarantee
that it can buffer and forward all palette writes, since the 21555 has finite buffer space and no backoff mechanism
when snooping. The 21555 should not be configured to appear as a VGA device in those applications where it may
try to configure the 21555 as a snooping agent.
The parallel ROM can be used to store VGA BIOS code, which is mapped through the Primary Expansion ROM
BAR.
2.3.2 Secondary Bus VGA Support
The 21555 can be enabled to decode VGA transactions on the secondary bus for forwarding to the primary bus.
This is done by setting the VGA Enable field in the Chip Control 0 register to 10b. The addresses that are decoded
are the same as for the primary VGA decode, and again the addresses are not translated.
Upstream forwarding of VGA transactions can be useful for applications that want to allow access to a primary bus
VGA device frame buffer by local processors in intelligent I/O or embedded subsystems.
Note: VGA decoding must not be enabled for both the primary and secondary interface. The value 11b is
illegal for the VGA Enable field and can yield unpredictable results.
2.4 Programming Notes
2.4.1 Addressing
The non-transparent addressing model that the 21555 uses can cause problems if not programmed properly.
Programming errors include:
Table 4. Decoded and Not Decoded Addresses
Memory addresses [000BFFFFh : 000A0000h]
I/O addresses:
AD[9:0]3BBh:3B0h
3DFh:3C0h
Bits not decoded.
AD[31:16]000h
(No address translation is performed on these addresses.)