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Page 18 Epson Research and Development
Vancouver Design Center
S1D13705 Hardware Functional Specification
X27A-A-001-10 Issue Date: 02/02/01
5.2 Pin Description
Key:
5.2.1 Host Interface
I=Input
O=Output
IO = Bi-Directional (Input/Output)
P=Power pin
C = CMOS level input
CS = CMOS level Schmitt input
COx = CMOS output driver, x denotes driver type (see I
OL
/I
OH
in Table 6-4: “Output Specifications,” on page 25)
TSx =
Tri-state CMOS output driver, x denotes driver type (see I
OL
/I
OH
in Table 6-4: “Output Specifications,” on
page 25)
CNx =
CMOS low-noise output driver, x denotes driver type (see I
OL
/I
OH
in Table 6-4: “Output Specifications,” on
page 25)
TEST = CMOS level test input with pull down resistor
Pin NamesTypePin #Cell
RESET#
State
Description
AB0 I 70 CS Input
This pin has multiple functions.
• For SH-3/SH-4 mode, this pin inputs system address bit 0
(A0).
• For MC68K #1, this pin inputs the lower data strobe (LDS#).
• For MC68K #2, this pin inputs system address bit 0 (A0).
• For Generic #1, this pin inputs system address bit 0 (A0).
• For Generic #2, this pin inputs system address bit 0 (A0).
See Table 5-2: “Host Bus Interface Pin Mapping,” on page 22
for
summary.
AB[16:1] I
45, 53, 54,
55, 56, 57,
58, 59, 62,
63, 64, 65,
66, 67, 68,
69
C Input These pins input the system address bits 16 through 1 (A[16:1]).
DB[15:0] IO
3, 4, 5, 6, 7,
8, 9, 11, 12,
13, 14, 15,
16, 17, 18,
19
C/TS2 Hi-Z
These pins have multiple functions.
• For SH-3/SH-4 mode, these pins are connected to [D15:0].
• For MC68K #1, these pins are connected to D[15:0].
• For MC68K #2, these pins are connected to D[31:16] for a
32-bit device (e.g. MC68030) or D[15:0] for a 16-bit device
(e.g. MC68340).
• For Generic #1, these pins are connected to D[15:0].
• For Generic #2, these pins are connected to D[15:0].
See Table 5-2: “Host Bus Interface Pin Mapping,” on page 22
for
summary.